Power consumption has increasingly become important in computer systems. Current designs of processor cores are predicting power figures above 100 Watts. The management of power consumption while simultaneously delivering acceptable levels of performance is becoming a critical task with the proliferation of application domains such as wireless communication and embedded signal processing. In addition, it has become increasingly important to manage power consumption in high-performance, general purpose microarchitectures. It has been forecast that, without significant advances in design for low power, processors of the future will consume hundreds of watts of power. We believe that a synergistic hardware-software approach is required. A lot of attention has been paid to optimizing power at the circuit and gate levels. Recently, power optimizations at the architecture and software (i.e., compiler, operating system, and application) level have begun to receive increasing attention. The purpose of this workshop is to draw together researchers and practitioners concerned with compiler and operating system support for low power for a stimulating exchange of views. Presentations from invited speakers from both the industry and academia will provide insights into emerging issues related to this area of research. Topics of interest include (but are not limited to):
Please email submissions by August 10, 2002. You should receive an acknowledgment of your submission by the following week. Authors will be notified of acceptance or rejection by August 23, 2002 and the final papers are due by September 13, 2002.
All submissions will be refereed, and workshop attendees will
receive copies of all accepted papers.
Important Dates
August 10: Electronic submission due August 23: Notification of authors September 13: Final version of papers due
Diana Marculescu, Carnegie Mellon University dianam@ece.cmu.edu J. Ramanujam, Louisiana State University jxr@ece.lsu.edu
Luca Benini, DEIS Universita' di Bologna lbenini@deis.unibo.it David Brooks, Princeton University dbrooks@ee.princeton.edu R. Chandramouli, Stevens Institute of Technology rchandr1@stevens-tech.edu Bruce Childers, University of Pittsburgh childers@cs.pitt.edu Marco Cornero, STMicroelectronics marco.cornero@st.com Nikil Dutt, University of California, Irvine dutt@ics.uci.edu Rajiv Gupta, University of Arizona gupta@cs.arizona.edu Mary Janie Irwin, Penn State University mji@cse.psu.edu Mahmut Kandemir, Penn State University kandemir@cse.psu.edu Uli Kremer, Rutgers University uli@cs.rutgers.edu Rainer Leupers, University of Dortmund leupers@iss.rwth-aachen.de Ragunathan Rajkumar, Carnegie Mellon University raj@ece.cmu.edu Anand Sivasubramaniam, Penn State University anand@cse.psu.edu Vamsi K. Srikantam, Agilent Laboratories vamsi@labs.agilent.com Chau-Wen Tseng, University of Maryland tseng@cs.umd.edu Arnout Vandecappelle, IMEC/DESICS vdcappel@imec.be N. Vijaykrishnan, Penn State University vijay@cse.psu.edu