Suresh Rai is a professor who has also worked as an Associate Editor for IEEE Trans. Reliability. His research interests include Network routing, DDoS and wavelets, Digital logic testing and neural models, Reliability evaluation of multiprocessor and distributed networks, Mutation testing and fault injection for software, Traffic characterization in Internet and ATM, and Fault tolerant computing.

His research on the topic ``Neural network approach towards logic testing and design-for-testability'' has been supported by the Air Force Office of Scientific Research.

Dr. Rai has taught courses in the area of reliability engineering, fault diagnosis, Internet, ATM, and microprocessor. He is a co-author of the book Waveshaping and Digital Circuits, and tutorial texts Distributed Computing Network Reliability and Advances in Distributed System Reliability. He has guest edited a special issue of IEEE Transactions on Reliability on the topic ``Reliability of Parallel and Distributed Computing Networks.'' Dr. Rai has worked as program committee member for IPCCC '91 (Phoenix) and 1st Conference on Fault Tolerant Systems (I.I.T., Madras, Dec. 1995).

Dr. Rai has received the best paper award at the 1998 IEEE International Performance, Computing, and Communication Conference (Feb. 16-18, Tempe, Arizona) for the paper entitled `` Analyzing packetized voice and video traffic in an ATM multiplexer" co-authored with Dr. Y. C. Oh.

Dr. Rai is a Senior Member of the IEEE and member of the ACM.

Some of his recent publications are as follows:

S. Rai. "Evaluating FTREs for dependability measures in fault tolerant systems," IEEE Trans. Computers, vol. 44, No. 2, pp. 275-285, Feb. 1995.
S. Rai, M. Veeraraghavan, and K.S. Trivedi, "A survey of efficient reliability computation using disjoint products approach," Networks, vol. 25, No. 3, pp. 147-163, May 1995.
S.Rai, J.Trahan, and T.Smailus, "Processor allocation in faulty hypercube multiprocessors," IEEE Trans Parallel and Distributed Systems, vol. 6, No. 6, pp. 606 - 616, June 1995.
S. Rai and W. Deng, "Hyperneural network - An efficient model for test generation in digital circuits," IEEE Trans. Computers, vol. 45, No. 1, pp. 115-121, Jan. 1996.
S. Rai and V. P. Kirpalani, "A modified TRAM architecture," IEEE Trans. Computers, vol. 45, No. 8, pp. 969-974, August 1996.
R. R. Brooks, S. S. Iyengar, and S. Rai, "Comparison of genetic algorithms and simulated annealing for cost minimization in a multisensor system," Opt. Eng., 37 (2), pp. 1-12, Feb. 1998.
S. Rai and Y. C. Oh, "Analyzing packetized voice and video traffic in an ATM multiplexer," Journal of Communication Systems, May/June 1998 (accepted).
S. Rai and Y. C. Oh, "Tighter bounds on full access probability in fault-tolerant multistage interconnection networks," IEEE Trans. Parallel and Distributed Systems (accepted).
P. Pancha, M. Veeraraghavan, and S. Rai, "Comparison of video conference realization schemes," IEEE Int. Conf. on Communications, (Montreal, Canada, June 8-12, 1997).