Selected Publications

Book and Book Chapters        

• R. Vaidyanathan and J. L. Trahan, "Dynamic Reconfiguration: Architectures and Algorithms,"     Kluwer Academic/Plenum Publishers, January 2004.

• R. Vaidyanathan and J. L. Trahan, "Dynamic Reconfiguration on the R-Mesh," Handbook of Parallel Computing: Models, Algorithms and Applications, S. Rajasekaran and J. Reif, eds., CRC Press, 2007.
  
  

Selected Journal Articles         Back to top

• M. Feldman, A. El-Amawy, A. Srivastava and R. Vaidyanathan, "Adjustable Wollaston-Like Prisms," Review of Scientific Instruments, vol. 77, 2006     Abstract

• K. Roy, R. Vaidyanathan and J. L. Trahan ``Routing Multiple Width Communications on the Circuit Switched Tree,'' International Journal of Foundations of Computer Science, vol. 17, No. 2, April 2006, pp. 271-285. Abstract

• H. P. Dharmasena and R. Vaidyanathan, ``The Mesh with Binary Tree Networks: An Enhanced Mesh with Low Bus-Loading,'' The Journal of Interconnection Networks, vol.5, no.2, June 2004, pp.131-150. Abstract

• H. P. Dharmasena and R. Vaidyanathan, ``Lower Bounds on the Loading of Multiple Bus Networks for Binary Tree Algorithms,'' IEEE Transactions on Computers, vol. 53, no. 12, December 2004, 00. 1535-1546. Abstract

• R. Vaidyanathan, J. L. Trahan and C-m. Lu, ``Degree of Scalability: Scalable Reconfigurable Mesh Algorithms for Multiple Addition and Matrix-Vector Multiplication,'' Parallel Computing, 2003, vol. 29, no. 1, pp. 95-109. Abstract

• J. A. Fernandez-Zepeda, R. Vaidyanathan, and J. L. Trahan, ``Using Bus Linearization to Scale the Reconfigurable Mesh,'' Journal of Parallel & Distributed Computing, 2002, vol. 62, no. 4, pp. 495-516. Abstract

• J. L. Trahan and R. Vaidyanathan, ``Scaling Multiple Addition and Prefix Sums on the Reconfigurable Mesh,'' Information Processing Letters 2002, vol. 82, no. 6, pp. 277-282. Abstract
  
  
  
  

Patents         Back to top

• M. Feldman, A. El-Amawy and R. Vaidyanathan, "Optical Slab Waveguide for Massive, High-Speed Interconnects," US Patent 6332050, Dec. 2001.
  Licensing information

• M. Feldman, A. El-Amawy and R. Vaidyanathan, "Optical Crossbar Switch," US Patent 6792175, Sept. 2004.
  Licensing information

• R. Vaidyanathan and M. C. Jordan, "A Configurable Decoder for Pin-Limited Applications," Application filed 2007. Licensing information
  
  
  
  

Selected Conference Papers         Back to top

• K. Roy, R. Vaidyanathan, J. L. Trahan, "Input-Queued Switches with Logarithmic Delay: Necessary Conditions and a Reconfigurable Scheduling Algorithm," Proc. Symp. on Architectures for Networking and Communications Systems, 2008, pp. 121-122.

• S. L. Bishop, S. Rai, B. Gunturk, J. L. Trahan, R. Vaidyanathan, "Reconfigurable Implementation of Wavelet Integer Lifting Transforms for Image Compression," Proc. ReConFig 06, Sept. 2006, pp. 20-22.     Abstract

• R. Vaidyanathan and K. Sethuraman ``On Mapping Multidimensional Weak Tori on Optical Slab Waveguides,'' Proc. International Conference on Parallel Processing , 2005, pp. 219-226. Abstract

• K. Roy, R. Vaidyanathan and J. L. Trahan, ``Configuring the Circuit Switched Tree for Multiple Width Communications,'' Proc., Workshop on Advances in Parallel & Distributed Computational Models , 2005. Abstract

• K. Roy, J. L. Trahan and R. Vaidyanathan, ``Configuring the Circuit Switched Tree for Well-Nested and Multicast Communication,'' Proc. 16th IASTED International Conference on Parallel and Distributed Computing and Systems, pp. 392-397, 2004. Abstract

• H. M. El-Boghdadi, R. Vaidyanathan, J. L. Trahan and S. Rai, ``On Designing Implementable Algorithms for the Linear Reconfigurable Mesh,'' Proc. Int. Conf. on Parallel and Distributed Processing Techniques and Applications, pp. 241-246, 2003. Abstract

• H. P. Dharmasena and R. Vaidyanathan, ``Fault Tolerance in Multiple Bus Networks with Unbalanced Resource Utilization,'' Proc Int. Conf. on Parallel and Distributed Processing Techniques and Applications, pp. 246-252, 2003. Abstract

• N. Srivastava, J. L. Trahan, R. Vaidyanathan, and S. Rai ``Adaptive Image Filtering using Run-Time Reconfiguration,'' in Proc. 10th Reconfigurable Architectures Workshop, 2003, included in Procs. $17^{\rm th}$ International Parallel \& Distributed Processing Symposium, 2003, p. 180. Abstract Also available at the IEEE Computer Society link.

• M. Feldman, A. El-Amawy and R. Vaidyanathan, ``Free Space All-Optical Crossconnect,'' Proc. IASTED International Conference on Parallel and Distributed Computing and Systems (PDCS), Special session on Optical Networking and Communications Systems, Cambridge, Massachusetts Nov. 4-6, 2002, pp. 828-832. Abstract

• H. M. El-Boghdadi, R. Vaidyanathan, J. L. Trahan and S. Rai ``Implementing Prefix Sums and Multiple Addition Algorithms for the Reconfigurable Mesh on the Reconfigurable Tree Array,'' Proc. International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA'02), Las Vegas, Nevada, June 24-27, 2002, vol. 3, pp. 1068-1074. Abstract

• H. M. El-Boghdadi, R. Vaidyanathan, J. L. Trahan and S. Rai ``On the Communication Capability of the Self-Reconfigurable Gate Array Architecture,'' Procs. 9th Reconfigurable Architectures Workshop (RAW 2002), in Proc. Int. Parallel \& Distributed Proc. Symposium, p 152. Abstract

R. Vaidyanathan
Associate Professor
Department of Electrical and Computer Engineering
Louisiana State University
Baton Rouge, LA 70803-5901

Phone: (225) 578-5238
Fax: (225) 578-5200
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